The present invention relates generally to integrated circuit packages and more specifically to methods of manufacturing integrated circuit packages including flip chip integrated circuit die attached to a substrate.
In the integrated circuit packaging industry, there is continuous pressure to reduce the cost of manufacturing integrated circuit package. To accomplish this, a wide variety of package designs and assembly methods have been developed. One particular type of package currently being produced is referred to as a flip chip ball grid array package. This type of package can provide a very small, relatively cost effective package sometimes referred to as a flip chip or chip scale package. However, because of the very large numbers of this type of package currently being produced, and because of the competitive nature of the integrated circuit package industry, even a slight reduction in the costs of producing this type of package can provide a substantial advantage. Therefore, it is desirable to provide an improved, less costly method of manufacturing integrated circuit packages such as flip chip ball grid array packages.
For comparative purposes, a current method of manufacturing a slip chip ball grid array package, designated by reference numeral 100, will be briefly described with reference to FIGS. 1A-D. As illustrated in FIG. 1A, package 100 includes an overall substrate 102 and a flip chip integrated circuit die 104. Die 104 includes a plurality of contacts 106 for electrically connecting die 104 to substrate 102. Typically, contacts 106 are provided in the form of solder balls.
Overall substrate 102 includes a stiffener 108 and an interconnecting substrate 110. In this case, interconnecting substrate 110 is a conventional flex tape substrate such as a polyimide tape substrate. Stiffener 108 is provided as a layer of metal material having a window punched through its center to provide an open space for mounting die 104 to flex tape substrate 110. Once stiffener 108 has been punched, it is attached to interconnecting substrate 110 as shown in FIG. 1A. With overall substrate 102 assembled, it is positioned and prepared to being the assembly of package 100. This is accomplished by fluxing interconnecting substrate 110 so that the contact points on interconnecting substrate 110, indicated by reference numeral 112, are ready to receive contacts 106 of die 104 as illustrated in FIG. 1A.
As also shown in FIG. 1A, the next step involved in manufacturing integrated circuit package 100 is the step of positioning die 104 on substrate 102 using a conventional vacuum pickup tool. Die 104 is then attached to substrate 102 by reflowing solder ball contacts 106. After die 104 is attached to substrate 102, the assembly is typically cleaned to remove any excess flux. As illustrated in FIG. 1B, and if desired, die 104 may be underfilled at this point in order to stabilize and protect the connections between die 104 and interconnecting substrate 110. This is accomplished using any conventional underfill technique.
Referring now to FIG. 1C, the next step of the prior art method being described involves attaching a plurality of solder ball contacts 114 for connecting integrated circuit package 100 to external elements. As shown in FIG. 1C, package 100 is turned over and fluxed so that the contact points on interconnecting substrate 110, indicated by reference numeral 116, are ready to receive solder ball contacts 114. In a manner similar to that describe above for die 104, solder ball contacts 114 are picked up and positioned on interconnecting substrate 110 using a conventional vacuum pickup tool. Once properly positioned on interconnecting substrate 110, contacts 114 are attached to package 100 by reflowing solder ball contacts 114. After contacts 114 are attached to package 100, the assembly is typically cleaned to remove any excess flux remaining on the package. This step of cleaning the assembly completes the basic assembly of the package if additional heat dissipating elements are not required.
Although the above described method results in a useful package, it is desirable to provide this type of package at the lowest possible cost. The present invention provides a method of manufacturing a flip chip ball grid array package which eliminates some of the steps require to produce the package. By reducing the number of steps required to manufacture the package, the cost of producing the package may be reduced.
In certain situations in which additional heat dissipating characteristics are required, an additional heat sink 118 may be attached to the top of prior art package 100 as illustrated in FIG. 1D. Although this configuration improves the heat dissipating characteristics of the package, it may not provide sufficient heat dissipating characteristics. Accordingly, it is desirable to provide a package configuration having even greater thermal dissipating characteristics than the above described configuration. The present invention provides arrangements and methods of producing integrated circuit packages which are capable of improved heat dissipating characteristics compared to the prior art configuration described above.
As will be described in more detail hereinafter, a method forming an integrated circuit package is disclosed herein. The method includes the step of providing a flip chip integrating circuit die having a first plurality of contacts for electrically connecting the die to other elements. A second plurality of contacts for electrically connecting the integrated circuit package to external elements is also provided. Initially, a substrate for supporting the flip chip die and the second plurality of contacts is prepared. The substrate includes a connecting arrangement for electrically connecting the first plurality of contacts on the die to the second plurality of contacts. With the substrate prepared, the flip chip integrated circuit die and the second plurality of contacts are positioned on the substrate. Wit the flip chip die and the second plurality of contacts in position, both the first plurality of contacts on the flip chip die and the second plurality of contacts are simultaneously attached to the substrate thereby electrically connecting the die and the second plurality of contacts to the substrate.
In one embodiment, the first and the second plurality of contacts are solder balls. In this embodiment, the step of attached both the first plurality of contacts on the flip chip die and the second plurality of contacts to the substrate includes the step of reflowing the solder balls.
In another embodiment, a vacuum pickup tool is used to pick up the die and the second plurality of contacts and to position the die and the second plurality of contacts on the substrate. The vacuum pickup tool includes a pickup head designed to pick up both the die and the second plurality of contacts and simultaneously position the die and the second plurality of contacts on the substrate.
In another embodiment, the substrate includes a heat conducting stiffener that supports the connecting arrangement on a first surface of the stiffener. Wit this configuration, the first plurality of contacts and the heat conducting stiffener provide a thermal path for dissipating heat away from the die. In one version of this embodiment, the connecting arrangement includes a layer of electrically insulating material deposited on the first surface of the stiffener and a pattern of electrically conductive traces formed on the insulating layer. These traces electrically connect the first plurality of contacts on the die to the second plurality of contacts. Alternatively, the connecting arrangement may include a thin flex tape substrate supported on the first surface of the stiffener. In order to further improve the heat dissipating characteristics of the package, a heat sink may be attached to a second surface of the stiffener.
In another embodiment of the method, the method further includes the step of attaching a metal cap to the integrated circuit package after the flip chip die has been attached to the substrate. The metal cap is attached to the integrating circuit package such that the metal cap covers and protects the flip chip die. The metal cap may be attached to the integrated circuit package using any conventional attachment method. In one version of this embodiment, the metal cap is glued to the die. This provides good thermal contact between the metal cap and the die. Alternatively, a thermal grease maybe used to improve the thermal contact between the metal cap and the die. Preferably, the metal cap is attached to the integrated circuit package such that a bottom lowermost surface of the metal cap is substantially in a common plane with a plane extending through a plurality of lowermost points on the second plurality of contacts. This configuration allows the integrated circuit package to be attached to an external element with the bottom lowermost surface of the metal cap and the lowermost points of the second plurality of contacts all providing attachment points to the external element. The connection between the bottom lowermost surface of the metal cap and the external element provides a direct thermal path for dissipating heat away from the die.
An integrated circuit package manufactured using the methods of the present invention is also disclosed. The integrated circuit package includes a flip chip integrated circuit die having a first plurality of contacts for electrically connecting the die to other elements. A second plurality of contacts provides an arrangement for electrically connecting the integrated circuit package to external elements. The die and the second plurality of contacts are attached to a first surface of a substrate. The substrate has a connecting arrangement for electrically connecting the first plurality of contacts on the die to the second plurality of contacts. A metal cap is attached to the integrated circuit package such that the metal cap covers and protects the die. The metal cap is positioned such that a bottom lowermost surface of the metal cap is substantially in a common plane with a plane extending through a plurality of lowermost points on the second plurality of contacts. This configuration allows the integrated circuit package to be attached to an external element with the bottom lowermost surface of the metal cap and the lowermost points of the second plurality of contacts all providing attachment points to the external element. The connection between the bottom lowermost surface of the metal cap and the external element provides a direct thermal path for dissipating heat away from the die.